Jepael wrote:Other cards that do have the IDE interface at least has removed RP1 to disconnect IDE chip selects from ISA address bus, but also removed a 0-ohm configuration resistor RA2.
http://s192804805.onlinehome.us/images/1/5916 … WHA151A00-1.jpg
Great picture! It is exactly the card that I have... same FCC ID, etc., but with IDE interface. So, yeah, exactly as you point out, RP1 and RA2 are notably missing (both 0-ohm resistors), which are no problem to remove (I'll try it first with them in place and then removed). The one thing that has me concerned now is X3... the 24Mhz oscillator. It is present on your picture, but not on my card. It appears that the traces for it ultimately connect to pins 51 and 52 on the YMF-718-S. Not sure if this is related to or required for IDE functionality... notably, the picture of the card that appiah4 posted does not have the 24Mhz oscillator (and is the same YMF-718-S chip).
Reading more about the YMF-718-S chip itself (found a datasheet for YMF-715 which should be close enough I think http://www.alldatasheet.com/datasheet-pdf/pdf … HA/YMF715E.html) it seems that both the 33Mhz and 24Mhz clocks are used to generate a "master clock" in the chip... no mention of the 24Mhz oscillator being optional, but it doesn't seem to be related to the operation of the IDE interface at all. The 0-ohm RA2 seems to be connected to the XA24 pins, so perhaps that is present on my card because the oscillator is not present (where the opposite is true on your picture). The 0-ohm bridge RP1 is definitely related to the IDE though. The IDE device select and IRQ pins are connected to pins MP6, MP7, and MP8 on the YMF-718-S, which are, per name, multi-purpose pins based on selected configuration. One of the configurations (SEL=2) is to use the MP6,7,8 pins for higher address bits, so your comments line up about the IDE not working with the bridge present as it connects the chip and those traces to the high address bits of the ISA bus. So, it seems apparent that what I need to do is remove RP1 and change the chip configuration from SEL=2 to SEL=1... SEL=2 when pin SEL1 (pin 72) is high (SEL0, SEL2 low), and SEL=1 when pin SEL0 (pin 73) is high (SEL1, SEL2 low). Looking at the traces to pins 72 and 73, it looks like the board designer had this option in mind exactly. There are two resistors just right of the Atmel chip, a 0-ohm and 10k-ohm resister -- on my card, they are oriented "horizontally" which make pin 72 goes to the 10k-ohm to pull high, and 73 goes to the 0-ohm to pull low, whereas in the picture of yours, the resisters are "vertical" which makes pin 72 go through the 0-ohm (low) and 73 to the 10k-ohm (high). Neat.
So, required steps (totally untested at this point, just theoretical):
1. Add 40-pin header
2. Remove 0-ohm array RP1
3. Remove SEL0, SEL1 resistors and re-orient to provide alternate SEL value (pin 73 to 5V via 10k, pin 72 to GND via 0-ohm).
See, kids, reading is good!