I noticed the pins aren't through-hole for your jumper. Are you using a special surface mount header for this? I didn't see flared feet on your photo.
I see you wrote the following,
NA-SEL#.
Default is jumpered 1-2 or No jumper. No jumper = NC and 20k pullup. 1-2 = Connected & 20k pullup. 2-3 = NC and 100r pulldown.
However, I am still a little confused. Which jumper position is used for the SXL and which is used for the i486SX for the situations in which, a) the chipset does not support pipelining, b) the chipset supports pipelining and drives NA#, and c) the chipset supports pipelining but does not drive NA# ? Seems like there are 6 conditions.
From what you've written, and viewing D-4 in the processor databook,
No jumper:
The NA# pin from the female side of the interposer is not connected to the male side of the interposer. In addition, the female side of the interposer has NA# pulled up to 3.6 V via a 20K resistor on the interposer. This corresponds to i486SX (chipset does not support pipelining).
1-2:
The NA# pin from the female side of the interposer is connected to the male side of the interposer. In addition, the NA# pin is pulled up to 3.6 V via a 20K resistor on the interposer. This corresponds to SXL (chipset does not support pipelining)
2-3:
The NA# pin from the female side of the interposer is not connected to the male side of the interposer. In addition, the NA# pin is pulled down to GND via a 100-ohm resistor on the interposer. This corresponds to i486SX (chipset supports pipeling but does not drive NA#). Is there an equivalent SXL option in which NA# is connected from male to female sides here (w/pulldown)?
Is there also an option in which the NA# pin from the female side of the interposer is connected to the male side of the interposer and there aren't any pullups or pulldowns? This would correspond to the chipset supporting pipelining and driving NA# directly (SXL). Alpha 1/2 were wired in this manner.
However, when I measured the NA# pin on a few motherboards, I noticed the following:
Rabbit, 4.7K pullup to 5V
UMC, 10K pullup to 5V
Dtk Symphony, 10K pullup to 5V
Symphony 2, 1K pullup to 5V
C&T, 4.7K pullup to 5V
SiS460, 4.7K pullup to 5V
VIA, short to 5V
ALi, 10K pullup to 5V
which would imply to me that the chipset does not supporting pipelining. Which chipsets used on a 386DX supported pipelining?
Do you know what the advantage of the C&T F82C351/C is compared to B1? Were all the C chips rated for 40 MHz? I see the F82C351/C going for about $19 USD.
From my experience with Varta leaks on these 386 boards, you need to remove any components which you suspect may have trace damage. I've had to remove ISA slots, AT power connectors, SIMMs, DIP sockets, etc to fix bad leakages. Be sure to neutralise the spill using a vinegar bath.
I had one C&T board in which the DRAM ran very hot and the board eventually died. I never troubleshooted the issue and used the board as a parts donor.
Yes, the MB-1340C uses 64Kx4 for the 256K option, however, there are at least 3 variants of 64kx4 that I am aware of. Some are DIP-24 and some are DIP-28. Of the DIP-28 format, there are two different pinouts, that is, one has an extra CE2# pin, while the other is N/C for the same pin. To further the complication, the motherboard has DIP-28 sockets for both the DATA and TAG sockets. I don't have the DIP-28 variant which has the extra CE2# pin.
Plan your life wisely, you'll be dead before you know it.