There will be no conflict. Cyrix uses different register indexes than SiS. All those register indexes not used by Cyrix will be passed to bus so chipset can handle them.

aitotat wrote on 2023-04-03, 07:27:

There will be no conflict. Cyrix uses different register indexes than SiS. All those register indexes not used by Cyrix will be passed to bus so chipset can handle them.

Thank you, I was hoping this would be the situation. Do you happen know what get's passed through, all < 0xC0 or all not implemented by the CPU? I am wondering how the 471 will react to a read of say 0xC2 which the Cx486DLC does not implement.

It was mentioned in the Cyrix datasheet. If I remember correctly, it passes everything that is not used by the CPU.

aitotat wrote on 2023-04-03, 09:36:

It was mentioned in the Cyrix datasheet. If I remember correctly, it passes everything that is not used by the CPU.

Thank you, I just checked the Cyrix_Cx486SLC_Data_Sheet_Feb92, Cyrix_Cx486DLC_Data_Sheet_May92 and Cyrix_Cx486SLCe_Data_Sheet_1992 datasheets which all say:

Accesses to I/O port 22h with an index outside of the CO-CFh range also result in external I/O cycles and do not affect the on-chip configuration registers.

These are the only ones I have for 486 class Cyrix CPUs and none of them mention 0xFE and 0xFF. I wondered what would happen when I tried to read them, so I put a bug in my code and checked.

Notice that with the Sis 471 the return values are 00000000 rather than 000000FF. I suspect I could adjust SIV to allow for this, but need to see what happens when a Cyrix CPU is in a SiS 471 board to sensibly do this. I expect with a Cyrix CPU far fewer registers will be read than for the X299 case.

I just found http://bitsavers.informatik.uni-stuttgart.de/ … 5x86_199507.pdf and it says:

Otherwise, external I/O cycles will occur if the register index number is outside the range C0-CFh, FEh, FFh. The MAPEN field must remain 0 during normal operation to allow system registers located at port 22h to be accessed.

I'm running QDI V4S471 with Cyrix 5x86/100, works flawlessly.

dj_pirtu wrote on 2023-04-04, 09:42:

I'm running QDI V4S471 with Cyrix 5x86/100, works flawlessly.

Good, I expected it would work, what I am wondering is what will get returned when the Cyrix CRn registers are read.

Assuming you have Windows NT or 9X on the system please will you run my SIV utility and post the initial and Menu->Hardware->CPUID->CPU-0 screens which will be similar to the ones I posted?

I wonder if SIV will report the SiS 571 chipset information (Menu->Hardware->Chipset ->Chipset MCH )? If not and you post the Menu->File->Save Local files I will try and fix it.