rasz_pl wrote on 2021-06-02, 08:23:
ViTi95 wrote on 2021-06-01, 17:38:
Some video cards are just faster in VBE2 mode, don't know exactly why.
me neither, but this fascinates me 😮
It finally hit me - chaining. 13h must be fully compatible with original VGA, which was build on top of EGA. 13h is a chain-4 mode. http://www.brackeen.com/vga/unchain.html#4
I was just reading 1992 Cirrus Logic GD5402/AVGA2 datasheet (available here http://www.vgamuseum.info/index.php/cpu/item/ … 02-acumos-avga2) learning about cool stuff this early chip supported:
- ability to ignore Reads relying on motherboard bios configuring A0000 shadow ram caching. Would be perfect for speeding up invisibility readback in Doom 😀 as even 386SX-25 does 10MB/s ram read speed vs 1-3MB/s of ISA VGA read.
- two independent linear sliding access windows.
- not fully documented, but mentioned in passing ability to map 128KB linear window A0000-Bffff to VGA memory.
- Set/Reset and Compare registers extended to full 8 bits and read/write mode 1 extended to 8 bytes at a time 😮 with extra foreground/background masks. If Im calculating correctly this means you can perform internal copies at 12-20MB/s and lines/pattern fills at 24-40MB/s
"D3 Selects the memory read data latches to be eight bytes wide, instead of the normal four bytes.
This bit can be used in Write Mode 1, in order to rewrite 8 latched pixels (64 bits) back into display
memory. This bit should be used in X8 addressing mode only."
- Start Address extended to 17 bits for a 128KB wrap around, enables 4 independent scrollable pages in linear 13h. Also considering Start Address is automatically latched on Vsync this should allow for perfect Vsync in linear 13h without switching pages in the interrupt.
"Extended address wrap for 128K maps with 512K memory (allows 4 pages of Mode 13)"
and finally :
- Linear packed 13h!
"DO Selects High Resolution 256 Color Mode. The video data shift registers are configured so that one character clock equals eight pixels. This bit also enables true packed-pixel memory addressing.
“True packed-pixel addressing" means that all bytes are stored at every consecutive location in video memory; by contrast, in Chain 4 addressing as used in Mode 13h, consecutive pixels are stored in consecutive maps 0 through 3, at every fourth location in video memory."
Would love to see if there is any speed difference between stock 13h, modeX, and 13h in the above linear mode. Then again looking at http://www.os2museum.com/wp/fast-unaccelerated-vga/ AVGA2 is already as fast as its theoretically possible, (5.5MB/s at 11MHz ISA clock), at least with fast CPU.
Chained 13h where pixels are stored every 4 bytes definitely has potential of having an impact on performance. Linear addressing Vesa modes get rid of this kludge, and so does this AVGA2 special mode.