And some more:

The cooling system is not here yet, but it will look something like this:

That is absolutely awesome. Love those overkill period incorrect solutions based on some original components and pushing them to ridiculous limits! I'm absolutely after one of these once you release it!

Wow, estimate price? 😁

@hard1k thank you! That was the idea, to push the V2 as far as it can go, while being able to use it in a modern system.

@xelizor I won't be selling this, and I doubt anyone would want one, it's quite expensive to make one. I do plan to release the files after I get it working.

Interesting experiment, despite of at least three wasted Voodoo2s.

Please, don't make this monstrosity in large numbers, some day I'll need NOS spare chips for my old V2 cards 😀

Sweet !

Can you run a quad setup of these cards ? 😉

@analog_programmer
That's one way to call it 😀)
Don't worry, only a few of these cards will be made.
@weedeewee
I sure hope so, but it will need drivers.

April fools is early this year? Is this for real?

It's real...

sdz wrote on 2024-01-02, 21:23:

It's real...

Impressive! That project is a pretty serious engineering job for just one man.

Don't mind my joke about the wasted V2 chips 😉

Thanks!
I did not mind the joke 😀

sdz wrote on 2024-01-02, 20:22:

@xelizor I won't be selling this, and I doubt anyone would want one, it's quite expensive to make one. I do plan to release the files after I get it working.

Anthony does some similar crazy stuff and sells them - https://www.zxc64.com I've purchased a few.

Although yours does look very impressive with FPGA etc. Looks lovely.

Good luck with it!

@mwdmeyer thank you!

sdz wrote on 2024-01-02, 21:23:

It's real...

sdz, looking at that diagram and knowing that you put a lot of effort in reverse-engineering of 3dfx Voodoo videocards, some question comes to me about V1 SLI options. May I ask you something about SST-1 chips via PM?

Of course you can drop a PM, although I don't know how much I'd be able to help .

Today I resumed working on this, and did a minimal bring-up.
Programmed the microcontroller that does the power sequencing, brought up the board and all power rails (11 or so) are OK.

Also programmed the onboard FTDI IC that works as a JTAG for the Xilinx FPGA. I had to mess a bit with the ftdieeprom.tcl from Vivado 2023.2 to make it work, since I used a FT4232HA IC and not FT4232H. I can't upload the file here, because of copyright, but if anyone needs info (since there is none on the internet) how to get program_ftdi utility working with FT4232HA, drop a message.

And:
PCIe to PCI bridge is detected:

As well as:

The FPGA is detected and is working:

Sweet. Now I need to learn some Verilog to make the thing actually work.

awesome!!!

Thanks!

Another small update, got video out:

It's internally generated in the FPGA, it's not video data from the FBIs.

Now I need to measure default FBI video clock and FBI+TMU memory clocks on a regular voodoo 2 so I can configure some MMCMs and feed those clocks.
After that it should detect the FBI&TMU memory size in the control panel.

Also need to disable the RAMDAC for the start of the system power-up, so that those clocks are delayed a bit, and check if everything is still working fine. This is because the FPGA takes a bit to load its configuration.
Might be better to just check if the FPGA finishes loading its configuration before the system PCIe reset signal is deasserted.

Still ways to go.